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 * COURSE TITLE :COMPUTER ORGANISATION AND ARCHITECTURE**


 * COURSE CODE** : **KT6213**


 * LECTURER:** **Dr. Nasharuddin Zainal**

Email: nash@eng.ukm.my Tel: 013-3809708 / 03-89216324 Fax : 03-89216146 Department of Electrical, Electronic and Systems Engineering Faculty of Engineering and Built Environment Universiti Kebangsaan Malaysia


 * COURSE OBJECTIVES:**

The objective of this course is to make the students understand with a wide range of topics in the area of computer architecture focusing on performance and the hardware/software interface. The emphasis is on studying and analyzing fundamental issues in architecture design and their impact on computer performance.


 * COURSE SYNOPSIS:**

The course provide the organization and architecture of modem-day computers, emphasizing both fundamental principles and the critical role of performance in driving computer design. Emphasis will be placed on the function and operation of the Central Processing Unit. It will also cover the organization of other components of a computer system such as busses, internal memory, external memory and I/O devices, and how they all work together to form a functioning computer system.


 * COURSE CONTENT**:


 * Week || Topic || Details || Time Allocated

(hrs) ||
 * 1 & 2 || Introduction || ISA-HSA

Computer Evolution

Technology Trends

System Performance || 6 ||
 * 3 & 4 || Computer Structure

. || Structure & Function of Computer System

Bus Systems

Bus Arbitrations || 6 ||
 * 5 || Instruction Set Architecture (ISA) || ISA as an interface between hardware and software

Instruction Set Design Issue

Classifying ISA || 3 ||
 * 6 || Memory Addressing || Addressing Mode

CISC and RISC || 3 || Memory Hierarchy Design Cache Performance || 6 || Paging Segmentation || 2 || Instruction Pipeline MIPS Pipeline Pipelined vector processor RISC pipelining Instruction Dependencies || 4 || SIMD MIMD Processors Array Süperscalar Superpipelined Limitation and Dependency || 3 || Disk Array CD/DVD technology || 3 ||
 * 7 || Architecture || MIPS architecture || 3 ||
 * 8 || Mid-Sem Exam ||  ||   ||
 * 9 & 10 || Computer Memory || Main memory design
 * 11 || Virtual Memory || Cache analogy
 * 12 || Pipelining || Simple Pipeline
 * 13 || Parallel Processors || Processors Interconnection
 * 14 || I/O Devices || Hard Disk


 * COURSE EVALUATION:**

Quiz: 10 - 15% Assignment: 15 - 25% Mid-sem Exam: 25 - 35% Final Exam : __40 - 50%__ TOTAL 100%


 * REFERENCES:**

Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th Ed., Elsevier Science and Technology Book, 2007.
 * Main Reference Book:**

William Stallings, Computer Organization and Architecture, 6th Ed., Prentice Hall, 2003 Hayes J. P., Computer Architecture and Organization, 3rd Ed., McGraw-Hill, New York. 1998. Tanenbaum, A.S., Structured Computer Organization, 4th Edition, Prentice Hall, 1999. --nash@ukm--
 * Additional Reference Book:**